PCI FIBRE CARD 100MBPS – TXA025-01

Product specification

Model number: TXA025

Chipset: ICplus IP100A Ethernet Controller

Port number: 2 x SC or 1 x SC

Standard: IEEE 802.3?IEEE 802.3u?IEEE 802.3x?IEEE 802.1p

Data Rate: 10/100Mbps

Transmission Distance: 20 km

Interface: PCI

LED Indicator: 10/100Mb(Link/Act)

Dimension: 120 x 51 x 13.8mm

Support OS

Windows 10(32/64), 8 / 8.1 (32/64), 7 (32/64), Vista(32/64), XP(32/64), 2000

Windows Server 2012, 2008 R2, 2003(32/64)

Mac OS 10. x (Intel based, tested up to 10.9)

Linux 2.4. x and later (Tested up to 3.5)

Environment

Operating Temperature: 0 -70

Relative Humidity: 10%-90% (non-condensing)

Storage Temperature: -0?-80

Relative Humidity: 5%-90% (non-condensing)

Other Functions: WOL

Support PXE

Chipset Description:

The IP100A is a single-chip, full duplex, 10/100Mbps Ethernet MAC + PHY incorporating a 32-bit PCI with bus master support

The IP100A is designed for use in a variety of applications including workstation NICs, PC motherboards, and

Other systems utilizing a PCI bus that require network connectivity to an Ethernet or Fast Ethernet LAN.

The IP100A includes a PCI bus interface unit, IEEE 802.3 compliant MAC, transmit and receive FIFO buffers

IEEE 802.3 compliant 100BASE-TX, 10BASE-T, and 100BASE-FX PHY, serial 

EEPROM interface, expansion ROM interface, and LED drivers

The IP100A implements a rich set of control and status registers

Accessible via the PCI interface, these registers provide a host system visibility into the features 

And operating state of the IP100A

Network management statistics are also recorded

And host access to registers of the PHY device are facilitated through the IP100A’s PCI interface

The IP100A supports features for use in “Green PCs” or systems where control over system power consumption is desired

The IP100A supports several power down states, and the ability to issue a system

Wake event” via reception of unique user defined Ethernet frames

In addition, the IP100A can assert a wake event in response to changes in the Ethernet link status

Features:

Single chip 10/100BASE, half or full duplex Ethernet Media Access Controller

IEEE 802.3 compliant 100BASE-TX/100BASE-FX/10BSE-T

PCI Bus master scatter/gather DMA on any byte boundary

Full operation with PCI Clock from 25 MHz to 33 MHz

PCI Revision 2.2 compliant

On-chip transmit and receive FIFO buffers

On-chip LED drivers

Power management capabilities for ACPI 1.0 compliant systems

WakeOnLAN support

Management statistics gathering

IP multicast receive and filter support using 64 bit hash table

Transmit polling

Auto pad insertion for short packets

Programmable minimum Inter Packet Gap

Programmable transmit and receive FIFO watermarks

Smart Cable Analyzer (SCA) Support

Capable of using 93C46 or 93C56 EEPROM

On-chip crystal oscillator

On-chip voltage regulator

2.5/3.3V CMOS with 5V tolerant I/O

0.25µm technology

128-pin PQFP